The interconnecting leads between preamplifiers and read/write heads in hard disk drive devices are spaced very close together, often within a few mils of each other. The read sensors consist of very sensitive magnetoresistive material that cannot tolerate excessive voltages. In contrast, the write element consists of a thin-film inductor which requires large sub-nanosecond voltage swings for high data rate systems. Because of the close spacing of the writer and the reader, an asymmetrical voltage swing provided to the write head can couple into and damage the adjacent read element.
Prior art apparatuses for use in applying write signals for driving a write head to effect writing information to a memory device, such as write driver preamplifiers, are often not designed to effect symmetrical voltage swing during the write current reversal period. Write current reversal is commonly employed to differentiate between digital symbols (e.g., a “1” and a “0”) in writing information to a memory device. Any voltage asymmetry in carrying out write current reversal will result in energy coupling into the adjacent reader(s), and can damage or destroy the sensitive read element(s). Read elements and write elements are commonly situated in very close proximity in read/write heads associated with storage mediums such as hard disk drive devices.
The coupling current can be modeled to first order by:
                    I        =                  C          ⁢                                    ⅆ              V                                      ⅆ              t                                                          (        1        )                            Where, C is the average capacitance from the writer to the reader,                    dV is the asymmetrical voltage, and            dt is the net change in time.                        
From Eqn. (1) one can observe that the coupling current will increase when the spacing between traces is decreased ((i.e., when capacitance is increased), when the writer voltage is asymmetric (i.e., when dV is increased), or when the switching speed is increased (i.e., when dt is decreased).
Such prior art apparatuses further attempt to provide symmetrical voltage swing by biasing the common-mode write voltage about mid supply for a single write digital-to-analog converter (DAC) setting. Therefore, the writer's output common-mode will vary with the programmed write current and the writer's voltage swing will be symmetric for only one programmed setting. Further limitations of these prior art apparatuses include difficulty in providing continuous transient impedance matching at all frequencies of the preamplifier's output impedance to the external interconnection (flex) impedance. Therefore, these apparatuses have difficulty in enhancing the write driver performance over a wide range of operational data rates.
It is therefore desirable for the present invention to overcome the aforementioned problems and limitations associated with the prior art apparatuses that apply write signals to drive a write head for writing information to a memory device.